It is well-known that integrated circuit (IC) technologies bring compact mechanical packaging and low manufacture cost for applied circuits. To date, many digital and analog circuits, including complex microprocessors and operational amplifiers, have been successfully implemented in silicon based integrated circuits. However, one field that remains a challenge to employ in IC technology is radio frequency (RF) circuits, such as those used in cellular telephones, wireless modems, and other types of communication equipment. This is due to the difficulty of producing an excellent inductor in IC technologies that is suitable for RF applications.
U.S. Pat. No. 5,446,311 describes an inductor employed in an IC technology, shown in FIGS. 1. A novel structure in the patent is a flat (two-dimension) and spiral layout. This structure has at least three levels of metal separated from one another by isolating layers, such as silicon oxide layers. Each metal level is connected to nearby levels of metal through via plugs formed in the isolating layers. The first metal level 1 has to be used as a cross-under to make a connection to the circled terminal 6 of the spiral structure, as shown in FIG. 1A. Except for the first metal level, the other metal levels are identical spiral metal patterns, and via plugs effectively shunt the metal levels. Thus, at least two levels of metal are used for the inductor turns, and provide at least two inductors connected in parallel to reduce direct current (DC) resistance. Obviously, the DC resistance can be further decreased by shunting more metal layers if extra wiring levels are offered by the technology. The disadvantages of the flat spiral inductor of the prior art are described as follows.
First, when an electric current flows through the flat spiral inductor of FIG. 1, an induced magnetic field of the flat spiral inductor perpendicular to the plane of the substrate occurs. The magnetic field of the flat spiral inductor will penetrate the surface of the substrate in wide area, and thus affect significantly other components disposed over the same substrate during circuit operation.
Second, the quality factor (Q) of one inductor is generally used to indicate the capability of the inductor. A high-Q inductor means an excellent inductor. The Q value of one inductor depends on frequency, inductance (L), capacitance and resistance associated with the inductor. In an inductor, series resistance (Rs) of total metal coil line and parasitic capacitance associated with the inductor structure (Cd) both degrade the Q value of the inductor. In the flat spiral inductor of the prior art, wide metal lines reduce the series resistance, but also increase the inductor area and the parasitic capacitance associated with the inductor structure. The larger inductor area limits the integrating of the applied IC. Besides, the parasitic capacitance associated with larger inductor area decreases the self-resonance frequency of the inductor. This limits the useful frequency range of the flat inductor. Therefore, the flat spiral inductor has an inherent limit in the width of the metal lines due to the geometric structure thereof.
Third, it is well-known that the inductance of one inductor increases with the coil turns of the inductor in unit length. In the flat spiral inductor of the prior art, the outer turn coil is always longer than the inner turn coil, and thus the resistance of the flat spiral inductor increases rapidly with the coil turn numbers increasing. Therefore, in order to increase inductance, a flat spiral inductor must use a large amount of metal lines and sacrifice the Q value thereof due to high resistance. Besides, a high-L inductor also brings a larger area. Therefore, there is a limit of integration for the circuit where a high-L flat spiral inductor is applied.
Substantially, the disadvantages and limits of the flat spiral inductor are resulted from the geometric structure thereof. Accordingly, an objective of the invention is to provide an inductor with a three-dimension structure different from the flat structure of the inductor of the prior art.
Another objective of the invention is to provide an inductor capable of achieving high quality factor, high inductance, well integration and slight electromagnetic interference when applied in an integrated circuit.